This disclosure relates generally to the field of computer hardware, and more particularly to a receiver for a computer with a four-slice decision feedback equalizer (DFE).
Data transmission over computer networks may rely on high-speed input-output (I/O) electrical data transmission channels linking a data transmitter to a data receiver. A transmitter and a receiver may be incorporated into any computer hardware or device that communicates data over a network. A channel may have a bandlimited frequency/phase response due to non-ideal conditions, which may distort or attenuate the transmitted data propagating through the channel. These non-ideal conditions within the channel may cause inter-symbol-interference (ISI), leading to timing uncertainties at the receiver and an increase in the bit error rate (BER) of the received data.
To compensate for the channel-induced ISI, various equalization techniques may be implemented in a receiver. These equalization techniques may include a combination of digital and/or analog filters. Among these various types of filters are finite impulse response (FIR) filters and infinite impulse response (IIR) filters. Nonlinear IIR filters, also referred to as decision feedback equalizers, or DFEs, may exhibit a relatively high equalization capability. A DFE is a nonlinear equalizer that uses previous receiver decisions to eliminate the ISI on pulses that are currently being demodulated. In other words, the distortion on a current pulse that was caused by previous pulses is subtracted from the current pulse.